Latest Projects Based on Digital Signal Processing

Moving object detection is widely used in fields like aviation, marine, road monitoring for video surveillance and safety purposes. In this Digital signal processing project, we are going to discuss MPEG-4 based moving object detection and tracking system.

MPEG - 4 Moving Picture Experts Group is an organization who is responsible for video encoding standard. When compared to MPEG-1 and MPEG-2, MPEG - 4 encodes the video file in a smaller size which is why it is used widely in online streaming platforms and media file transfer. MPEG 2 is used in DVD’s and it has good video quality compared to MPEG 4.

ABSTRACT

In newly manufactured cars a lot of effort is put on reducing the background noise so that the person in the front seat can hear the voice from the rear seat. The main intension of this DSP project is to increase the audibility between the driver and the rear seat persons. This system is implemented in DSP –system in a test car, a microphone is placed in front of the driver to collect the speech and this microphone filters and remove the main part of the background noise. And loudspeakers are placed in the rear for the passenger to listen from the driver, there is a delay in sound of the driver to reach the passenger which makes the right voice of the driver. This evaluated system shows that there is increased audibility along with the no change in background noise.

ABSTRACT

This DSP project is based on vibration analysis procedure. This method has a quick way to implement in the existing method by attaching accelerometers outside the gearbox. By using this method we can easily identify the condition of gearbox. This method completely depends on the vibration frequencies in the gearbox.

Overview: A enormous number of multiplications with coefficients that don’t alter during the strangulation of Digital Signal Processing (DSP) and intermedia applications like Fast Fourier Transform (FFT) and audio/video pamphlets whose toted out it. The optimized architecture block of the multiplier is very necessary because this is the vital component for realizing computationally protracted applications and it’s influenced complete system performance.

By the use of Canonic Signed Digit (CSD) delineation, regular coefficients can be ciphered to enclose the least non-zero values. CSD multipliers cover the slightest non-zero fractional products which in turn reduces their switching motion. Folding technique is a very important process to decrease the silicon area by time manifold.

Although the CSD multipliers are compact wired to explicit coefficients, functional blocks like adders and subtractor are not profitable to it. Since the explicit products formation unit is produced uniquely for a group of coefficients and cannot be rephrased for another group, this multiplier design misses flexibility.

Current electronic systems which primarily consist of embedded circuitry focus on high-end application streams. It is prescribed for the productive utilization of computationally demanding digital signal processing (DSP) functions. For the digital signal processing (DSP) stream, hardware stimulation has been tested as an excessively auspicious implementation technique. The fusion of heterogeneity through functional hardware stimulators upgrades performance and decreases energy expenditure. 

As the multiple instantiated application-specific integrated circuits (ASICs) are required to quicken several kernels, ASIC creates the optimal accelerator solution in charge of overall power and design performance and their obstinacy to expand silicon complexity. In the initial data-flow graph (DFG) of the kernels, soaring performance formative data paths have been visualized to precisely map primitive or linked operations. 

In a controlled evident template library, the templates of convoluted linked operations are either derived precisely from the kernel’s data flow graph. Design selections on the stimulator datapath hugely bump its efficiency. The utilization of architecture level expansions like enlarged instruction-level replicas has worked on obscene grained decomposable datapaths.

For obtaining a tailored design structure, the domain explicit architecture formation algorithms alter the type and number of estimation units. Handling of multiple ALUs with heterogeneous arithmetic appearances has adopted an intrusive operation which is the string to set up the computation of integrated subexpressions.

Latest Projects based on digital signal processing